🚨 Adeia & AMD Settle Semiconductor Patent Dispute

Technology licensing company Adeia has settled two semiconductor patent lawsuits against chipmaker Advanced Micro Devices in a Texas federal court.

As part of the agreement, AMD will take a multi-year license to Adeia’s semiconductor IP portfolio, though the financial terms of the deal remain undisclosed. Adeia has also requested the court in Midland, Texas, to dismiss the cases.

According to Adeia CEO Paul Davis, resolving the dispute allows both companies to move forward and potentially explore future collaborations in advanced semiconductor technologies.

The lawsuits, filed in November, alleged that several AMD processors used in desktops, laptops, and servers infringed Adeia’s patents covering semiconductor manufacturing innovations such as hybrid bonding and advanced process nodes.

Adeia also claimed that AMD processors incorporating 3D V-Cache technology, including chips powering AI systems, were made using methods protected by its patented technologies. AMD had previously denied the allegations in court filings.

Adeia, based in San Jose, California, was previously the intellectual property licensing unit of Xperi before becoming an independent company in 2022.

⚖️ Case: Adeia Semiconductor Bonding v. Advanced Micro Devices Inc.
📍 U.S. District Court for the Western District of Texas

📌 Contact IP Consulting Group for tailored IP insights and legal guidance:
📧 protect@ipconsultinggroups.com
🌐 www.ipconsultinggroups.com
📞 DC: +1 (202) 666-8377 | MD: +1 (240) 477-6361

Infineon 2026 Latest Price Increase Notice

Most low & medium voltage MOSFETs are currently manufactured using 8-inch mature process technology. At present, the global 8-inch wafer capacity is in a structural contraction cycle.

Global 8-inch total capacity is projected to shrink by **2.4% year-on-year in 2026. Coupled with the shutdown of some production lines or their conversion to analog, MCU and other product categories, there has been a phased supply shortage in available capacity for MOSFETs.

Meanwhile, wafer foundry prices continue to rise, and the occupation of mature process capacity by AI chips has further intensified the shortage of foundry resources for MOSFETs, driving up overall production costs.

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Flavors That Unite, Culture That Inspires!

On February 25, Kinghelm and Slkor proudly hosted the 2026 4th Hometown Food Festival at our Shenzhen headquarters. Nearly 100 colleagues from across China gathered to share hometown specialties, celebrate regional culture, and strengthen team bonds.

This annual tradition is more than a food event — it reflects our belief that strong teams are built on connection, respect, and shared experiences. From Sichuan sausages to Chaoshan beef hotpot, from Jiangxi clay pot soup to Hunan cured meats, the diversity of flavors mirrors the diversity of talent within our organization.

Under the leadership of General Manager Song Shiqiang, Kinghelm and Slkor continue to combine technology innovation with people-centered corporate culture.

At Kinghelm, we connect the world.
At Slkor, we power the future with chips.

Learn more about us:
🌐 www.kinghelm.net
🌐 www.slkoric.com

AMEYA360丨NOVOSENSE and Inovance Automotive Co-Develop IC Solutions for Next-Generation Electric Drive Platforms

Conventional discrete electric drive designs rely on widely distributed components and complex wiring, often resulting in larger system size, higher power losses, slower response, and constrained reliability. As electric vehicles continue to demand longer driving range and higher output power, electric drive architectures are moving rapidly toward multi-in-one and highly integrated designs. In this context, semiconductor solutions must deliver greater functional integration while maintaining accuracy, reliability, and functional safety margins within limited space, without constraining system-level design flexibility.

Building on more than a decade of experience in motor controller system architectures and functional safety, Inovance Automotive proactively defined the key functional and performance requirements for the isolated sensing IC and logic ASC IC at an early stage of development. In response to these requirements, NOVOSENSE integrated high-voltage LDO, isolated sensing amplifier, and isolated comparator into a single isolated sensing IC. This integration significantly reduces external component while enabling high-precision isolated voltage sensing, fast OV/UV protection, and more compact electric drive designs.

The customized logic ASC IC further integrates multiple logic functions and supports frequency detection, enabling centralized handling of interface-related logic. This approach simplifies interface design, improves overall system integration, and supports more compact inverter layouts. At the same time, it helps reduce BOM cost and provides a solid foundation for optimizing functional safety architectures in electric drive and traction inverter systems.

By replacing mature discrete circuits with integrated IC solutions, the collaboration delivers clear system-level benefits.

Simplified architectures and fewer components reduce potential failure points and improve overall product robustness.

Higher integration lowers PCB area requirements, creating additional headroom for increased power density.

Standardized IC solutions also streamline development by reducing design and validation effort, helping shorten development cycles and accelerate time-to-market.

“Electric drive systems are entering a phase where higher integration is becoming essential, and progress at the chip level increasingly translates into system-level advantages,” said Zheng Chao, Director of the R&D Center at Inovance Automotive. “This collaboration combines our strengths in electric drive systems with NOVOSENSE’s expertise in automotive semiconductors. More importantly, it reflects an important capability upgrade for Inovance Automotive—we are not only developing high-performance power electronics products, but also participating from the outset in defining system architectures and core chips. We look forward to continuing our work with NOVOSENSE to shape next-generation electric drive platforms and deliver more competitive system solutions to OEMs.”

“NOVOSENSE and Inovance Automotive have established a strong foundation for collaboration,” said Ye Jian, Product Line Director at NOVOSENSE. “This project demonstrates both our customer’s confidence in our technology and our application-driven approach to innovation. By drawing on our long-standing expertise in isolation and interface technologies, we will continue to deliver high-precision, high-performance, and high-reliability IC solutions to support Inovance Automotive’s next-generation electric drive platforms.”

NOVOSENSE’s Isolation+ portfolio covers digital isolator, isolated sensing, isolated driver, isolated power, and isolated interface, with cumulative shipments exceeding two billion units as of October 2025. The company also offers a broad automotive interface portfolio—including CAN, LIN, SerDes, logic ICs, and level shifters—providing customers with one-stop automotive-grade isolation and interface solutions. Across the new energy vehicle electrical system, NOVOSENSE works with hundreds of component suppliers, delivering semiconductor solutions for traction inverter, onboard charger (OBC), DC/DC converter, and battery management system (BMS), spanning sensor, signal chain, power management IC, and MCU.

Silicon Semiconductor Manufacturing: From Ingot to IC

Semiconductor Manufacturing Process: From Silicon Ingot to Integrated Circuit

The semiconductor manufacturing process transforms raw silicon into high-performance integrated circuits that power modern electronics. From silicon ingot growth and precision wafer slicing to grinding, lapping, polishing, and microfabrication, each stage requires advanced technology and micron-level accuracy.

This blog provides a clear overview of the complete semiconductor manufacturing process, explaining how silicon wafers are produced, refined, and prepared for chip fabrication. It highlights the importance of precision cutting tools, diamond blades, and surface finishing solutions that ensure superior wafer quality, minimal material loss, and improved production yield.

Whether you are involved in wafer manufacturing, semiconductor R&D, or microelectronics production, this guide offers valuable technical insight into optimizing efficiency, maintaining tight tolerances, and achieving consistent, high-quality results throughout the semiconductor manufacturing process.

Electronic Engineer Electronics Enthusiast#ElectronicEngineer #ElectronicsEnthusiast #DIY #CHIPS #electronics #ICGOODFIND

Selecting the right Electronics Components Provider In India is essential for maintaining production timelines and quality standards. Ariseo Tech Electronics offers semiconductor sourcing backed by supplier networks and technical clarity.

Semiconductors Provider in India - Arise o Tech

The company supports OEMs, manufacturers, and R&D teams with dependable sourcing and consistent product availability. With a strong vendor network and technical understanding of electronic systems, it ensures timely supply of critical components.

Phone: +91-9268521661
Email: contact@ariseotechelectronics.com
Website: https://ariseotechelectronics.com/semiconductors/
Location: Delhi

Why are these chips tied up? Afraid they’ll run away? If you need a chips you can find #ICGOODFIND

⚡ Global Automotive Grade Silicon Carbide (SiC) Components Market (2025–2034)

2025 Market Size: USD 6.75B
2026 → 2034: USD 8.24B → USD 31.91B
CAGR: 21.3%
Regional Leader: Asia Pacific (76.14%, 2025)

Automotive Grade Silicon Carbide (SiC) Components Market 2034

Silicon Semiconductor Manufacturing: From Ingot to IC

How the Semiconductor Manufacturing Process Powers Modern Electronics

The semiconductor manufacturing process is one of the most advanced and precise production systems in the world. It transforms high-purity silicon into powerful integrated circuits that drive smartphones, computers, electric vehicles, AI systems, and industrial technologies.

The journey begins with silicon purification and single-crystal ingot growth, followed by wafer slicing, grinding, polishing, and rigorous quality inspection. These wafers then undergo complex fabrication steps such as photolithography, etching, ion implantation, and thin-film deposition to build microscopic transistor structures layer by layer. After fabrication, wafers are tested, diced into individual chips, packaged, and subjected to final performance verification.

Every stage of the semiconductor manufacturing process requires nanometer-level precision, ultra-clean environments, and advanced automation to ensure maximum yield and reliability. As technology advances toward smaller nodes and higher chip density, manufacturing innovation continues to evolve.

Understanding this process provides valuable insight into how modern electronics are designed, produced, and optimized for performance.

🧪 Global Semiconductor Etch Equipment Market (2025–2034)

2025 Market Size: USD 15.67B
2026 → 2034: USD 16.95B → USD 34.07B
CAGR: 9.10%
Regional Leader: Asia Pacific (66.50%, 2025)

https://www.fortunebusinessinsights.com/semiconductor-etch-equipment-market-109530

The US and Taiwan have signed a trade deal. In January, Commerce Secretary Howard Lutnick had claimed that Taipei would invest towards building chips and chipmaking factories in the US. According to him, Taiwan agreed to invest at least $250 billion in production capacity and to guarantee $250 billion in credit. The intended goal is to “bring 40% of Taiwan’s semiconductor supply chain to the U.S”, according to Lutnick. What is Trump’s endgame? Palki Sharma tells you.

Semiconductor Design and Verification: Trends Defining the Future

The semiconductor industry continues to evolve rapidly, driven by the demand for faster, more intelligent, and energy-efficient devices. As chip designs grow in scale and complexity, traditional design and verification approaches are no longer sufficient. Engineers must adopt modern methodologies to manage risk and ensure reliability.

At Vaaluka Solutions, we closely follow these advancements, helping customers adopt cutting-edge technologies with confidence. This article highlights the major trends influencing semiconductor design and verification today.

Design Trends

Growing SoC Complexity

Today’s chips integrate multiple functions, including AI processing, high-speed connectivity, and advanced power control. Shrinking process nodes have increased integration density, making design validation more challenging and error-prone.

To avoid expensive re-spins and delays, design teams are rethinking how they approach both architecture and verification.

RISC-V in Modern SoCs

RISC-V is becoming a preferred choice for customizable processor design due to its open architecture. While it offers flexibility and cost advantages, it also demands thorough verification of custom extensions, privilege modes, and security features.

Vaaluka Solutions supports RISC-V adoption with proven design and verification expertise.

Emphasis on Power Efficiency

Power-aware design has become essential for battery-operated devices. Techniques such as clock gating, power gating, and voltage scaling are now integrated early in the design phase to reduce energy consumption.

Verification Trends

Formal and Assertion-Based Techniques

Formal verification complements simulation by identifying corner-case issues that might otherwise be missed. Assertion-based checks embedded in RTL improve early bug detection and reliability.

AI-Driven Verification

AI and ML are increasingly used to automate test generation, analyze coverage data, and predict defect-prone areas. These tools help verification teams work faster while improving accuracy.

Shift to Pre-Silicon Validation

Pre-silicon validation using emulation, FPGA prototyping, and digital twins reduces dependency on post-silicon debugging. These techniques enable early performance and functional analysis.

Portable Stimulus Adoption

PSS allows verification intent to be reused across multiple platforms, improving efficiency and reducing redundant test development.

Cloud-Based EDA Tools

Cloud platforms enable scalable verification environments and improved collaboration for distributed teams, significantly reducing turnaround time.

Low-Power Verification

Verification of power intent using UPF ensures correct behavior across power states and operating modes.

Why Choose Vaaluka Solutions

With expertise spanning RTL design, functional verification, UVM, and FPGA prototyping, Vaaluka Solutions helps clients adopt emerging trends while ensuring design quality.

Conclusion

Modern semiconductor development demands advanced design and verification strategies. By adopting new technologies and methodologies, companies can accelerate innovation and reduce risk. Vaaluka Solutions remains committed to enabling success in this evolving landscape.

Modernizing Old Semiconductor Equipment with SECS/GEM Solutions

Introduction

In today’s highly competitive semiconductor manufacturing industry, efficiency, automation, and real-time data visibility are no longer optional — they are essential. However, many fabs still rely on legacy semiconductor equipment that lacks modern connectivity, automation, and data integration capabilities. This creates major challenges in productivity, traceability, and operational efficiency.

So, how to modernize old semiconductor equipment without completely replacing expensive machinery? The answer lies in SECS/GEM retrofit for legacy tools. By implementing SECS/GEM integration for old equipment, manufacturers can transform outdated machines into fully connected, intelligent production assets.

In this blog, we explore upgrading legacy semiconductor machines with SECS/GEM, key technical considerations, and the benefits of SECS/GEM modernization, along with strategies for achieving a cost-effective semiconductor equipment upgrade by working with a reliable SECS/GEM retrofit solution provider.

Understanding the Challenge of Legacy Semiconductor Equipment

Many semiconductor manufacturing facilities operate equipment that is 10–25 years old. While these machines are mechanically reliable, they often lack modern communication interfaces, automation compatibility, and real-time data monitoring capabilities.

Common Challenges Include:

Lack of host communication capability

Manual process control

Limited fault detection

No real-time production data

Difficult system integration

These limitations make it difficult to scale production, meet modern quality standards, and integrate with advanced Manufacturing Execution Systems (MES). That’s why manufacturers increasingly explore how to modernize old semiconductor equipment using standardized communication protocols like SECS/GEM.

What is SECS/GEM and Why Is It Essential?

SECS/GEM is a globally accepted communication protocol standard used in semiconductor manufacturing for host-equipment integration. It enables seamless data exchange, remote monitoring, equipment control, alarms, and event reporting.

Key Components:

SECS (SEMI Equipment Communication Standard) – Defines message structures

GEM (Generic Equipment Model) – Defines equipment behavior and automation logic

By implementing SECS/GEM integration for old equipment, manufacturers gain:

Automated equipment control

Real-time data visibility

Improved process stability

Seamless factory-wide integration

This is the foundation of upgrading legacy semiconductor machines with SECS/GEM.

How to Modernize Old Semiconductor Equipment Using SECS/GEM

One of the most common questions manufacturers ask is: how to modernize old semiconductor equipment without replacing costly machinery?

The solution is SECS/GEM retrofit for legacy tools, which involves adding hardware and software interfaces that enable modern communication capabilities.

Step-by-Step Modernization Process:

1. Equipment Assessment

Evaluate the current hardware, control systems, PLCs, and communication interfaces of the legacy tool.

1. Interface Design

Develop a customized SECS/GEM interface layer compatible with the machine’s architecture.

1. Protocol Integration

Implement full SECS/GEM integration for old equipment, enabling communication with MES and host systems.

1. Testing & Validation

Ensure compliance with SEMI standards and customer automation requirements.

1. Deployment

Seamless rollout without disturbing production.

Through this process, SECS/GEM retrofit for legacy tools enables seamless transformation while keeping costs controlled — a truly cost-effective semiconductor equipment upgrade.

Technical Approach: Upgrading Legacy Semiconductor Machines with SECS/GEM

Successful upgrading legacy semiconductor machines with SECS/GEM requires deep expertise in embedded systems, industrial communication, and semiconductor automation standards.

Key Technical Components:

Protocol converters

PLC integration modules

Data acquisition systems

Edge controllers

Custom middleware

These components act as a bridge between old machine controllers and modern host systems, enabling SECS/GEM integration for old equipment with minimal hardware replacement.

This approach ensures stable communication, reliable data flow, and compliance with global semiconductor automation standards.

Benefits of SECS/GEM Modernization

The benefits of SECS/GEM modernization go far beyond connectivity. It delivers measurable operational improvements across the entire fab.

Key Advantages:

1. Enhanced Equipment Utilization

Real-time monitoring allows proactive maintenance and faster troubleshooting.

1. Improved Process Control

Automated recipe management ensures consistency and precision.

1. Real-Time Data Collection

Improves analytics, yield optimization, and predictive maintenance.

1. Seamless MES Integration

Factory-wide automation becomes possible with SECS/GEM integration for old equipment.

1. Compliance & Traceability

Meets industry quality and compliance standards.

Ultimately, these benefits of SECS/GEM modernization directly translate into higher productivity, reduced downtime, and improved ROI.

Achieving a Cost-Effective Semiconductor Equipment Upgrade

Replacing legacy semiconductor tools can cost millions of dollars and lead to significant production downtime. That’s why SECS/GEM retrofit for legacy tools offers a highly cost-effective semiconductor equipment upgrade alternative.

Why SECS/GEM Retrofit is Cost-Effective:

Reuses existing mechanical infrastructure

Minimal hardware replacement

Faster deployment

Lower operational risk

Rapid ROI

Instead of complete tool replacement, manufacturers can extend equipment life by 10–15 years through upgrading legacy semiconductor machines with SECS/GEM — making modernization both strategic and economical.

Role of a SECS/GEM Retrofit Solution Provider

Working with a specialized SECS/GEM retrofit solution provider is crucial for successful implementation. Semiconductor automation requires deep domain expertise, protocol knowledge, and system integration experience.

Key Responsibilities of a Solution Provider:

Legacy system evaluation

Custom interface design

Protocol development

Factory integration

Validation and certification

Ongoing support

An experienced SECS/GEM retrofit solution provider ensures seamless execution, risk reduction, and long-term operational reliability.

Key Use Cases of SECS/GEM Integration for Old Equipment

1. Wafer Processing Tools

Modernize deposition, etching, and cleaning equipment.

1. Metrology & Inspection Systems

Enable real-time measurement data exchange.

1. Test & Packaging Equipment

Improve test automation and production reporting.

Each of these scenarios demonstrates how to modernize old semiconductor equipment using SECS/GEM retrofit for legacy tools effectively.

Best Practices for Successful SECS/GEM Modernization

To maximize the benefits of SECS/GEM modernization, manufacturers should follow best practices:

Perform complete equipment audits

Implement modular architecture

Ensure compliance testing

Plan scalable integration

Partner with a proven SECS/GEM retrofit solution provider

Following these guidelines ensures long-term success and system stability.

Future-Proofing Semiconductor Manufacturing

By adopting SECS/GEM integration for old equipment, fabs position themselves for Industry 4.0, smart manufacturing, and digital transformation.

Modernized equipment supports:

AI-driven analytics

Predictive maintenance

Smart scheduling

Digital twins

Thus, upgrading legacy semiconductor machines with SECS/GEM is not just modernization — it is future-proofing.

Conclusion

In an era of rapid technological advancement, semiconductor manufacturers must embrace digital transformation to remain competitive. Understanding how to modernize old semiconductor equipment through SECS/GEM retrofit for legacy tools offers a powerful, efficient, and economical pathway to modernization.

By upgrading legacy semiconductor machines with SECS/GEM, fabs gain automation, real-time data visibility, and seamless factory integration — all while achieving a cost-effective semiconductor equipment upgrade.

The benefits of SECS/GEM modernization include improved productivity, reduced downtime, enhanced quality, and extended equipment lifespan. Partnering with a reliable SECS/GEM retrofit solution provider ensures smooth implementation and long-term operational success.

If your fab is still operating legacy tools, now is the perfect time to invest in SECS/GEM integration for old equipment and unlock the full potential of your semiconductor manufacturing operations.

Taiwan Wants the U.S. to Understand That Relocating Chip Supply Chain is “Impossible”

Taipei pushes back on Washington’s onshoring ambitions, citing challenges in relocating its decades-old semiconductor ecosystem

Taiwan has told Washington that a proposal to move 40% of the island’s semiconductor supply chain to the United States is “impossible,” Taipei’s top trade negotiator said in an interview.

Speaking on a local television broadcast on Sunday, Vice Premier Cheng Li-chiun…

Taiwan Wants the U.S. to Understand That Relocating Chip Supply Chain is “Impossible”

FPGA Chip Unboxing Video

#Altera #FPGA #XILINX #UnboxingVideo #ChipDistributor #ChipProcurement #ICgoodFind

Budget 2026: निर्मला सीतारमण का ‘मास्टरस्ट्रोक’, चीन-अमेरिका की नींद उड़ाने वाला 40,000 करोड़ का ऐलान!

New Delhi News: वित्त मंत्री निर्मला सीतारमण ने आज बजट 2026 पेश करते हुए एक ऐतिहासिक फैसला लिया है। सरकार ने भारत को दुनिया का ‘टेक सुपरपावर’ बनाने के लिए अपना खजाना पूरी तरह खोल दिया है। इस बार सेमीकंडक्टर सेक्टर के लिए बजट आवंटन में भारी बढ़ोतरी की गई है। पिछले साल यह राशि 22,500 करोड़ रुपये थी, जिसे अब बढ़ाकर सीधे 40,000 करोड़ रुपये कर दिया गया है। मोदी सरकार का यह दांव न केवल भारत को…

Budget 2026: निर्मला सीतारमण का 'मास्टरस्ट्रोक’, चीन-अमेरिका की नींद उड़ाने वाला 40,000 करोड़ का ऐलान!

Budget 2026: निर्मला सीतारमण का ‘मास्टरस्ट्रोक’, चीन-अमेरिका की नींद उड़ाने वाला 40,000 करोड़ का ऐलान!

New Delhi News: वित्त मंत्री निर्मला सीतारमण ने आज बजट 2026 पेश करते हुए एक ऐतिहासिक फैसला लिया है। सरकार ने भारत को दुनिया का ‘टेक सुपरपावर’ बनाने के लिए अपना खजाना पूरी तरह खोल दिया है। इस बार सेमीकंडक्टर सेक्टर के लिए बजट आवंटन में भारी बढ़ोतरी की गई है। पिछले साल यह राशि 22,500 करोड़ रुपये थी, जिसे अब बढ़ाकर सीधे 40,000 करोड़ रुपये कर दिया गया है। मोदी सरकार का यह दांव न केवल भारत को…

Budget 2026: निर्मला सीतारमण का 'मास्टरस्ट्रोक’, चीन-अमेरिका की नींद उड़ाने वाला 40,000 करोड़ का ऐलान!

AMEYA360丨Fibocom Launches Global LTE Cat.1 bis Module LE271-GL

January 14, 2026 – Fibocom (300638.SZ | 0638.HK), a global leader in wireless communication modules and edge AI solutions, today announced the launch of its global LTE Cat.1 bis module, LE271-GL, providing IoT devices with single-SKU global connectivity. With compact size, global frequency coverage, low power consumption, and high compatibility, the LE271-GL offers a cost-effective 4G solution for worldwide IoT applications such as asset tracking, IP cameras, new energy systems, and consumer electronics.

Compact Design and Global Coverage
Measuring 17.7mm × 15.8mm, the LE271-GL is pin-to-pin compatible with Fibocom’s MC661, LE270, and LE37X series, as well as other modules of similar packaging. Customers can migrate without changing PCB designs. Supporting both FDD-LTE and TDD-LTE bands, the module covers all major global frequencies under a single SKU, simplifying inventory management and reducing logistics costs for international deployment.

High Performance and Fast Network Access
The LE271-GL ensures quick and stable connections, achieving network registration in under 3.5 seconds. Optimized AT command response and USB enumeration improve device startup and connectivity efficiency. Its OpenCPU architecture provides flexibility for secondary development, lowering overall device costs.

Ultra-Low Power and Extended Battery Life
Optimized for battery-powered applications, the LE271-GL achieves microamp-level sleep current and supports DRX and other low-power modes. Interfaces including VDD_EXT and multiple GPIOs remain powered in standby, ensuring long battery life while maintaining critical functionality.

Rich Functionality and Strong Compatibility
LE271-GL supports LBS + Wi-Fi scan positioning (for indoor and international use), eSIM, and single/dual-SIM configurations. It integrates USB, UART, SPI, I2C, ADC, LCD, Camera, and GPIO interfaces, and supports TTS, MQTT, HTTP, and SSL protocols for versatile IoT applications.

Now in the engineering sample stage, Fibocom’s LE271-GL sets a new benchmark for global Cat.1 bis connectivity, enabling customers and partners worldwide to explore new opportunities in the IoT market.